Redundant pulse monitoring network



C. 14, 1969 H, MOREmr-s ETAL 3,473,151

REDUNDANT PULSE MONITORING NETWORK Filed April 24, 1967 4 Sheets-Sheet l I I\"\ 'ENTORS GE/V HA ROAD MURE/NES GNTER J. GESSNER H.MoRE|Nl-:s ETAL 3,473,151

4 Sheets-Sheet z I N VENTORS HAROLD MORE/N55 @UNTER J. @ESSA/ER 9V/@MY AGENT' FIG. 2

Oct. 14, 1969 REDUNDANT PULSE MONITORING NETWORK Filed April 24, 1967 .l g n v v m. I T Vv k Vv fr IIL .MMU 0*, ----,-.w.mu- V V a a2 a... Il l k i h -I V... kh V er Ef 0d. 14, 1969 H, MORE|NE$ ET AL 3,473,151

REDUNDANT PULSE MONITORING NETWORK Filed April 24, 1967 4 SheeCS-Sheet 5 l l l l Q @En l l y l I l I v l VV VV VVV :M'ENTORS HAROL D MORE/NES GNTER J. @ESS/VER Oct. 14, 1969 Filed April 24, 1967 H. MoREaN-:s ET A1. 3,473,151

REDUNDANT PULSE MONITORING NETWORK 4 Sheets-Sheet g FROM FiG: 5

IM'EXTORS HA RLD MORE/NES GNTER J. GESSNER ILS. Cl. 348-167 10 Claims ABSTRACT OF THE DISCLOSURE A fail safe monitoring network including means for comparing redundant signals and for providing a square wave pulse and in which a timing gate pulse is generated in response to the square wave pulse. When the redundant signals correspond within predetermined limits, the square wave pulse goes through a transition from one logic level to another during the timing gate pulse and is reproduced for actuating an alarm device to an olf condition. When the redundant signals differ significantly the square wave pulse transition occurs outside of the timing gate pulse whereby a constant level output is provided for actuating the alarm device to an on condition.

CROSS REFERENCE TO RELATED APPLICATIONS The device of the present invention is an improvement over the monitoring device disclosed and claimed in copending U.S. application Ser. No. 545,027, filed Apr. 25, 1966 by Harold Moreines and Gunter J. Gessner and assigned to The Bendix Corporation, assignee of the present invention.

BACKGROUND OF THE INVENTION Field of the invention The present invention relates to signal monitoring in redundant computing and control systems and particularly to a fail safe monitor for comparing direct current or demodulated alternating current input signals and for providing a discrete output change when the difference between the input signals exceeds predetermined limits. More particularly, the invention relates to means for reproducing an input pulse when said input pulse goes through a transition from one logic level to another during a gating pulse provided by said means.

Description of the prior art Monitor networks now known in the art such as the monitor network disclosed and claimed in the aforenoted copending U.S. application Ser. No. 545,027 include means for comparing redundant input signals and for providing a pulse at a predetermined frequency when the input signals correspond and the monitor is operating properly. The pulse frequency varies when the difference between the input signals exceeds a predetermined limit or when a system malfunction occurs. When the pulses are provided at a frequency other than the predetermined frequency conventional inductance-capacitance band pass filters attenuate the pulses whereby an alarm device is actuated to an on condition. Filters of this type lack sharp tuning characteristics and do not have the capability of operating on pulsed data at low power levels so as to facilitate the use of microcircuits.

SUMMARY OF THE INVENTION The novel monitor network of the present invention includes first means for providing a first pulse having a predetermined pulse width. The first pulse is summed with one of a pair of redundant input signals and a differential amplifier provides a signal corresponding to the difference between the summed signal and the other redundant input nitecl States Patent O ICC signal. A capacitor is charged by the difference signal to a predetermined threshold level for triggering second means whereby a second pulse is provided. Means are provided for affecting a third pulse in response to the second pulse and for reproducing the second pulse as long as said second pulse goes through a transition during the third pulse thereby indicating proper operation of the monitored system, and which reproduced second pulse actuates an alarm device to an off condition. When the transition of the second pulse occurs outside of the third pulse indicating a system malfunction, the last mentioned means provides a constant level output which actuates the alarm device to an on condition. The second pulse or, alternately, the reproduced second pulse, is fed back to the first means to sustain the operation of the monitor whereby the transition of the second pulse occurs during the third pulse until a malfunction occurs.

One object of this invention is to provide a monitor network for a control system providing redundant input signals, and which monitor network includes means for indicating when the difference between the redundant input signals exceeds predetermined limits.

Another object of this invention is to include in a monitor network of the type described means for comparing the redundant input signals and for providing a pulse output, and means for reproducing the pulse output when the redundant input signals correspond within predetermined limits for actuating an alarm device to an off condition.

Another object of the invention is to include in a monitor network of the type described a filter which is responsive to the pulse output for providing a gating pulse. When the pulse output goes through a transition from one level to another during the gating pulse, the pulse output is reproduced by the filter and when the transition occurs outside of the gating pulse the filter provides a constant level output for actuating the alarm device to an on condition.

Another object of this invention is to provide a filter of the type described which is capable of operating on input pulses at low power levels whereby the use of microcircuitry is facilitated.

Another object of this invention is to include the filter in a feedback loop for sustaining operation of the monitor when the pulse output is reproduced.

These and other objects and features of the invention are pointed out in the following description in terms of the embodiments thereof which are shown in the accompanying drawings. It is to be understood, however, that the drawings are for the purpose of illustration only and are not a definition of the limits of the invention, reference being had to the appended claims for this purpose.

DESCRIPTION OF THE DRAWINGS FIGURE 1 is an electrical schematic diagram showing a monitor network constructed in accordance with the invention and including means for providing a pulse E8 and a filter 26 affected by the pulse E8.

FIGURE 2 is a graphical illustration showing pulse waveforms provided during normal operation of the monitor network and when the pulse E8 and its complementary pulse s go through a transition from one logic level to another during a timing gate pulse E10 provided by the lter 26.

FIGURE 3 is a graphical illustration showing pulse waveforms provided during an abnormal operating condition of the monitor network and when the pulse *s goes through a transition outside of the pulse E10.

FIGURE 4 is a graphical illustration showing pulse waveforms provided during another abnormal operating 3 condition of the monitor network and when the pulse 'B goes through a transition outside of the pulse E10.

FIGURE is an electrical schematic diagram showing an embodiment of the invention wherein the filter 26 is included in a feedback loop to sustain the operation of the monitor whereby the pulses E8 and s go through a transition during the pulse E until a monitor failure occurs.

At a time designated as T0 in the graphical representation Of FIGURE 2, an oscillating cycle is started by a pule ET having a positive saw toothed waveform, as shown in FIGURE 2, and applied through a conductor 2 from a pulse source designated by the numeral 1 in FIG- URE 1 to a monostable multivibrator 4. Monostable multivibrator 4 is of the type generally shown and described at page 200, Basic Theory and Application of Transistors, Department of the Army, 1959, and has a stable and an unstable state. Monostable multivibrator 4 is initially in its stable state and is triggered to its unstable state by the pulse ET applied through the conductor 2. Monostable multivibrator 4 remains in the unstable state for an interval T1 and T2, Shown in the graphical representation of FIGURE 2, reverting at the time T2 to its stable state after a predetermined delay period and providing at an output conductor 3 a positive pulse E1 having a pulse width D1 as shown in FIGURE 2, determined by the interval between the times T1 and T2. The positive pulse E1 from monostable multivibrator 4 is applied, through the conductor 3 to a summation means 8 at which the positive pulse El is algebraically summed with a control signal e applied at a conductor 7A, and the resultant summation signal E2 applied to the conductor 8A.

The system monitored by the device of the present invention may be a dual channel aircraft control system including a signal device 7 for providing at the output conductor 7A the direct current or demodulated alternating current aircraft control signal e, and including a signal device 9 for providing at an output conductor 9A a direct current or demodulated alternating current signal e0 corresponding to signal e. When the aircraft control system is operating properly, signal e from signal device 7 and signal e0 from signal device 9 are of the same polarity and differ in amplitude within predetermined limits. When a system malfunction occurs, that is, if the difference between the direct current or demodulated alternating current signals e and e0 exceeds the predetermined limit, or if the signals e and e0 are of opposite polarities, the monitoring device of the present invention brings into operation an alarm device 32, as hereinafter described.

Signal e from signal device 7 is applied through the output conductor 7A to the summation means 8, and combined thereat with the positive pulse E1 applied from monostable multivibrator 4 through the output conductor 3. Summation means 8, provides at the output conductor 8A the summation signal E2. Summation signal E2 from summation means 8 is applied through the output conductor y8a to a differential amplifier 12 and signal e0 from signal device 9 is applied through the output conductor 9A to the differential amplifier 12. Differential amplifier 12 algebraically subtracts signal e0 from signal E2 and provides at the time T2, Shown in FIGURE 2 a difference signal E5 at an output conductor 13.

The pulse E5 from the differential amplifier 12 is applied, through the output conductor 13 and a resistor 16, to a plate 17 of a capacitor 18, while an opposite plate 19 of the capacitor 18 is connected to ground. Capacitor 18 charges to the level of pulse E5 during a time interval T2 to T4 otherwise shown as TD in FIGURE 2 to provide at the time T4 a triangular shaped ramp E6 at a conductor 21. Ramp E6 is applied through the conductor 21 to a Schmitt trigger 20. Schmitt trigger 20 is of the type such as that generally shown and described at pages 431- 434 of Electronics for Scientists, Malmstadt, et al., Benjamin, 1963, being in a disabled state when the ramp E6 is below a predetermined threshold level and triggered to its enabled state When the ramp E6 equals or exceeds the threshold level, thereupon providing at an output conductor 23 a pulse E7. he Schmitt trigger 20 remains in the enabled state, acting to provide the output pulse E7 until capacitor 18 is discharged below the threshold level of Schmitt trigger 20, Schmitt trigger Ztl thereupon reverting to the disabled state terminating the output pulse E7.

The pulse E7 is applied through the conductor 23 to a monostable multivibrator 22 which is of a type similar to monostable multivibrator 4, being initially in its stable state and triggered at the time T4 shown in FIGURE l by the pulse E2 to its unstable state. Monostable multivibrator 22 remains in the unstable state for the time T4 to T6, otherwise shown as D2 in FIGURE 2 so as to provide at an output conductor 27 a pulse E2 having a waveform as shown in FIGURE 2. Thus, the monostable multivibrator 22 reverts to its stable state at time T6 to complete an oscillating cycle of the monitoring device.

Pulse E2 is applied through the output conductor 27 to an inverter 24, and which inverter 24 provides at an output conductor 29 a complementary pulse s having a waveform as shown in FIGURE 2. The pulse E2 is applied through the output conductor 27 to a conductor 31 leading from a point 33 on the conductor 27 to a filter 26. The pulse s provided by the inverter 24 is applied through the conductor 29 to the filter 26, and through a conductor 35 joining the conductor 29 at a point 37 to a conductor 39 leading from a point 41 on the conductor 35 to the filter 26.

Filter 26 is affected by the pulses E2 and 13 2 so that if said pulses go through a transition from one logic to another at the times T4 and T6 shown in FIGURE 2, thus indicating proper operation of the control system, filter 26 provides, in a manner which will be hereinafter explained, a pulse s at an output conductor 38, and said pulse s being a reproduction of the pulse E8 and having a Waveform, as shown in FIGURE 2. The pulse s' is applied through the output conductor 38 to an amplifier 40. The amplified pulse at an output conductor 42 of the ampli- -fier 40 is applied to a pulse transformer 44 which provides a pulse at an output conductor 46, and which pulse is applied through the output conductor 46 to a rectifier 48. The rectified pulse at an output conductor Sti of the rectifier 48 energizes a relay 52 whereupon the alarm device 32 is actuated to an ofi state.

When the pulses E8 and s go through a transition at times other than the times T4 and T6 shown in FIGURE 2, the output s of the filter 26 is provided at a constant level as shown in FIGURES 3 and 4, and said output is thus ineffective to energize the relay 52 whereupon the alarm device 30 is actuated to an on state indicating a system malfunction.

The pulse B from the inverter 24 is applied through the conductor 29 and the conductor 35 leading from the point 37 on the conductor 29 to the monostable multivibrator 4 so as to trigger the monostable multivibrator 4 to its unstable state. When the pulse s goes through its high to low transition at the time T6, shown in FIG- URE 2, monostable multivibrator 4 is triggered to its unstable state at the time T6 and the operation of the monitor is sustained so as to provide at the output conductor 27 of the monostable multivibrator 22 the pulse E2, as long as the system is operating properly and there is no monitor malfunction.

The filter 26 is affected by the .pulses E8 and g so as to generate a timing gate pulse El@ having a waveform as shown in FIGURES 2, 3 and 4, and during which timing gate pulse E10 the transition of the pulses -EB and s must occur in order for the lter 26 to provide the output s at the alternate high and low levels whereby said output s is reproduced and the reproduced output is effective for energizing the relay 52. During normal operation of the system, and in the absence of monitor failures, the transition of pulses Es and s, occurs during the aforenoted timing gate pulse E1s, but when the system is operating improperly or a monitor failure occurs, the transition of pulses Es and s occurs outside of the timing gate pulse E1s and the output s is provided at a constant high level, as shown in FIGURES 3 and 4, which is ineffective for energizing the relay 52.

The filter 26 includes a diferentiator 60 which is connected to the inverter 24 through the output conductor 29, a diierentiator 76 which is connected to the monostable multivibrator 22 through the conductor 27 and the conductor 31 leading from the point 33 on the conductor 27. The lter 26 further includes a monostable multivibrator 66 which is connected to the inverter 24 through the conductor 39 which leads from the point 41 on the conductor 35, and which conductor 35 leads from the point 37 on the output conductor 29 of the inverter 24.

The monostable -multivibrator 66 is of a type similar to the monostable multivibrators 4 and 22 and is initially in its stable state. The pulse s from the inverter 24 triggers the monostable multivibrator 66 to its unstable state, with the arrangement being that monostable multivibrator 66 is triggered to its unstable state when the pulse s goes through a high to low transition as shown at time T4 iu FIGURE 2. The monostable multivibrator 66 remains in its unstable state for the time T4 and T5, and at the time T5 monostable multivibrator 66 reverts to its stable state to provide at an output conductor 68 a pulse Es having a waveform as shown in FIGURE 2 and having a pulse Width Ds as determined by the interval T4 to T5.

The pulse Es is applied through the output conductor 68 to a monostable multivibrator 70. Monosta-ble multivibrator 7 0 is of a type similar to the monostable multivibrator 66, being initially in its stable state and triggered by the pulse Es to its unstable state at the time T5 shown in FIGURE 2. Monostable multivibrator 70 remains in its unstable state for the interval T5 to T7 to provide at an output conductor 72 and at the time T7 the timing gate pulse E1s having a pulse D4 as determined by the interval T5 to T7.

The pulse E1s from monostable multivibrator 70 is applied through the output conductor 72 to an inverter 69, and which inverter 69 provides at an output conductor 7S a complementary pulse 1s and having a waveform as shown in FIGURE 2. The pulse 1s is applied through the output conductor 75 to a set terminal '77 of a iiip flop 74 and the pulse E1s from the monostable multivibrator 70 is applied through the output conductor 72 and a conductor 76 joining the conductor 72 at a point 78 to a reset terminal 73 of the tlip op 74.

The ip iiop 74 is of the type shown in :block diagram form in FIG. 9-396 at page 343 of Pulse, Digital, and Switching Waveforms, Millrnan and Taub, McGraw-Hill, 1965, and has, in addition to the set terminal 77 and the reset terminal 73, a trigger terminal 75. As explained at pages 343 and 344 of the aforenoted reference, a flip flop such as the flip flop 7 4 has two stable states. The application of the pulse 1s to the set terminal 77 establishes the ip flop 74 in one of its stable states whereby an output at a high level is provided and the application of the pulse 1s to the reset terminal 73 establishes the flip iiop 74 in the other of its stable states whereby an output at a low level is provided. A triggering pulse E14 applied to the trigger terminal 75 of the flip tlop 74 causes the iiip flop 74 to charge its state regardless of the state that the ilip op 74 is in, and an output is provided at the output conductor 38 leading from the flip flop 74, which output corresponds to the input at the time the triggering pulse E14 is applied.

The triggering pulse E14 is provided by an AND gate 78 in response to the outputs from the ditferentiators 60 and 76 at the output conductors 67 and 71, respectively, and which outputs are provided, in turn, in response to the pulses s and Es from the inverter 24 and the monostable multivibrator 22, respectively.

The pulse s from the inverter 24 is applied through the conductor 29 to the differentiator 60, and which differentiator 60 provides at the output conductor 67 a pulse 12 having a waveform as shown in the graphical representation of FIGURE 2. The pulse 12 occurs at the transition times T4 and T5 of the pulse s as may be seen from FIGURE 2. The pulse Es from the monostable multivibrator 22 is applied through the conductor 27 to the conductor 31 leading from the point 33 on the conductor 27 to the differentiator 76, and which differentiator 76 provides at the output conductor 71 a pulse E12 having a waveform as shown in the graphical representation of FIGURE 2 and which pulse E12 occurs at the transition times T4 and Ts of the pulse Es. The pulses E12 and 12 are complementary to each other, as shown in FIGURE 2.

The pulse 12 from the diferentiator 60 and the pulse E1s from the ditlerentiator 76 are applied through the conductors 67 and 71, respectively, to the AND gate 78, and which AND gate 78 provides at an output conductor 80 the negative going pulse E14 having wave- `form as shown in FIGURE 2 and occurring at the transition times T4 and Ts of the pulses Es and s.

The negative going pulse E14 acts as a clock pulse and is applied to the trigger input of the flip flop 74 enabling the iiip flop 74 to provide a pulse output during the transition times T4 and Ts, at which time T4 the pulse s goes through a high to low transition and at which time T5 the pulse s goes through a low to high transition. The arrangement is such that at the time T4, when the input at the reset terminal 73 is at a high level and when the input at the set terminal 77 is at a low level, the flip op 74, triggered by the pulse E14, provides a low output, and at the time Ts when the input at the reset terminal 73 is at a low level and when the input at the set terminal 77 is at a high level, the ip flop 74, triggered by the pulse E14 provides a high output. In other words, when the pulses E1s and 1s are absent (time T4), the output of iilter 26 is low and when the pulses E1s and E1s are present (time Ts) the output of lter 26 is high. The transition of the pulses Es and s at the times T4 and Ts thus causes the pulse E14 to appear alternately during the time pulses E1s and 1s are present and during the time said pulses are absent. The output of the flip flop 74 at the conductor 38, which output is the output of the filter 26, changes from high to low at the time T4 and from low to high at the time Ts to reproduce the waveform of pulse s, with the reproduced waveform being shown as pulse s in FIGURE 2.

The pulse s is applied to the amplifier 40 and therefrom through the pulse transformer 44 and the rectifier 48 for energizing the relay 52 whereby the relay 52 actuates the alarm device 32 to an off condition.

The affect of the transition of the pulse s occurring outside of the gating pulse E1s may best be illustrated with reference to FIGURES 3 and 4.

In FIGURE 3 the pulse s is shown to have an increased pulse width D2', and which increased pulse Width Ds may be affected by the capacitor 18 being charged to the threshold level of the Schmitt Trigger 20 later than would otherwise be the case in response to the difference signal E5 from the differential amplifier 12 being of a magnitude and polarity so as to indicate that the signals e and es differ in excess of a predetermined limit in one sense. In this event the transition of the pulse s may be seen to occur at times T4 and Ts', and which times T4 and Ts' occur outside of the range of the pulse E1s as shown in FIGURE 3 and when the input to the Hip flop 74 is at a constant level. The flip iiop 74 is triggered by the pulse E14 at the times T4 and Ts whereby the constant level input is switched to the output conductor 38 with said switched output being designated as s in FIGURE 3. The pulse transformer 44 in FIG- URE 1 is unresponsive to the constant level output s whereby the relay 52. is de-energized and the alarm device 32 provides an on indications.

In FIGURE 4 the pulse s is shown to have a decreased pulse width Ds and which decreased pulse width Ds" may be affected by the capacitor 18 being charged to the threshold level of the Schmitt trigger 20 sooner than would otherwise be the case in response to the difference signal E from the differential amplifier 12 being of a magnitude and polarity so as to indicate that the signals e and es differ by more than a predetermined limit in another sense. In this latter event the transition of the pulse s may be seen to occur at the times T4 and T", and which times T4 and Ts" occur outside of the range of the pulse E1s as shown in FIGURE 4 and when the input to the iiip op 74 is at the constant level. the flip iiop 74 is at the constant level. The ilip flop 74 is triggered by the pulse E14 at the times T4" and Ts whereby the constant level input is switched to the output conductor 38, with said switched constant level input being designated by s in FIGURE 4. The pulse transformer 44 lin FIGURE l is unresponsive to the constant level output Es whereby the relay 52 is de-energized and the alarm device 32 provides an on indication.

With reference to FIGURE 5, there is shown an embodiment of the invention wherein the novel feature of the lter 26 in reproducing the pulse s when the input signals e and es correspond within the predetermined limits is employed to sustain the operation of the monitor whereby the transition of the pulses Es and s occurs during the pulse E10, as heretofore noted. As shown in FIGURE 5, the filter 26 provides the output s' at the output conductor 38 and which pulse s is applied to the amplifier 40l shown in FIGURE 1, and applied through the output conductor 38 and through a conductor 38a joining the conductor 38 at a point 43 to the monostable' multivibrator 4. When the s is a reproduction of the pulse s, the monostable multivibrator 4 is triggered to its unstable state at the time Ts shown in FIGURE 2 whereby the monostable multivibrator provides at the output conductor 3 the pulse E1 which is applied to summation means 8 shown in FIGURE l as heretofore noted. In the event that the output is s" at the constant level, the operation of the monitor is interrupted. Thus, in the embodiment of the invention shown in FIGURE 5 the filter 26 is included in the feedback loop of the monitor so that the pulse Es is provided as a function of the output of the filter 26 whereby the degree of fail safe performance of the monitor is improved.

OPERATION The capacitor 18 is charged by the output of the differential amplifier 12, and which output corresponds to the difference between the signals e and es from the signal sources 7 and 9, respectively. When the redundant input signals e and es correspond within predetermined limits, the capacitor 18 will charge to the threshold level of the Schmitt trigger 20 during the interval T2 to T4 otherwise shown as TD and the Schmitt trigger 20 provides the pulse E7 which is applied to the monostable multivibrator 22. The pulse E7 triggers the monostable multivibrator 22 which provides the pulse Es having the pulse width Ds as shown in FIGURE 2, and which pulse width Ds is deter-- mined by the interval Ts to Ts.

The pulse Es is applied to the diiferentiator 76 in the lter 26 and through an inverter 24 to the diierentiator 60 in the lter 26, and which dilerentiators 6()y and 76 provide the differentiated pulses ls and E12, respectively. The output of the differentiator 24 is applied to the monostable multivibrator 66 in the filter 26 and is also fed back to the monostable multivibrator 4 to sustain the oscillation of the monitor whereby the pulse Es having the pulse width D2 is provided until a malfunction occurs.

The monostable multivibrator l66, in response to the output of the inverter 24 provides a pulse E9 having a pulse -width Ds as determined by the interval T4 to T5, and which pulse E9 triggers the monostable multivibrator 70 whereby the gating pulse E1s having a pulse width Ds as determined by the interval T 5 to T7 is provided.

The pulse E10 from the monostable multivibrator 70 is applied to the reset terminal 73 of the flip op 74 and the complementary pulse ls provided by the inverter 64 is applied to the set terminal 77 of the flip op 74. The differential pulses ls and E1s from the diiferentiators 60 and 76 are applied to the AND gate 78 which responds to the differentiated pulses and provides at the times T., and T6 shown in FIGURE 2 a triggering pulse E1s for triggering the flip llop 74. The flip flop 74, triggered by the pulse E14, provides an output corresponding to its input at the times T4 and Ts, and which output is at alternate high and low levels reproducing the waveform of the pulse s provided by the inverter 24. The Output of the ip op 74 is applied to an amplifier 40 and therefrom through a pulse transformer 44 and a rectiiier 48 for energizing a relay 52 whereby the alarm device 32 is actuated to an off state.

The pulse s is reproduced as long as the transition of the pulse s occurs during the pulse E1s as may be seen with reference to FIGURE 2, and which event is occasioned by the signals e and es corresponding within predetermined limits as heretofore noted.

When the signals e and es differ so as to affect the charging time of the capacitor 18, whereby the capacitor 18 is charged to the threshold level of the Schmitt trigger 20 sooner or later than would otherwise be the case. the width of the pulse Es changes to D2 as determined by the interval T4 and Ts shown in FIGUR-E or Ds as determined by the interval T4 to Ts" as shown in FIG- URE 4. Thus, as may be seen with reference to FIGURES 3 and 4, when the capacitor 18 is so alected, the transition of the pulse s will occur at the times T4' and Ts' or T4 and Ts, and in which either event the transition occurs outside of the pulse E1s and when the input to the flip iop 74 is at a constant level. The flip flop 74 is triggered by the pulse E14 at the times T4 and T5' or at the times T4 and Ts" whereby the flip iiop 74 provides the output s" at a constant level and thus effectively blocks power to the relay 52 causing the alarm device 32 to be actuated to an on condition.

As heretofore noted, the output s of the flip flop 74 provided at the output conductor 38 is a reproduction or' the pulse s as long as the signals e and es correspond within predetermined limits. The embodiment of the invention shown in FIGURE 5 employs this novel feature wherein the filter 26 is included in the feedback loop of the monitor and the oscillation of the monitor at the predetermined frequency is sustained by the output s at the output conductor 38 until a malfunction occurs. In this connection it is to be noted that when the embodiment of the invention shown in FIGURE 5 is employed the degree of fail safe performance of the monitor is considerably improved since the operation of the monitor is a function of the filter 26.

The monitor of the present invention is capable of operating on pulse data at low power levels, and thus facilitates the use of microcircuitry so that bulky space Consuming components may be eliminated. The arrangement is such that the monitor is fail safe for all open and shorted circuit conditions internal to the lfilter 26.

What is claimed is:

l. A device for monitoring a control system providing redundant electrical signals, comprising:

first means for providing a first pulse;

summation means connected to the first means for summing the first pulse and one of the redundant input signals and for providing a summation signal;

comparator means for comparing the summation signal with another redundant input signal and for providing a signal corresponding to the difference therebetween;

second means connected to the comparator means and affected by the difference signal therefrom for providing a triggering pulse;

third means connected to the second means and responsive to the triggering pulse for providing a second pulse;

fourth means connected to the third means and responsive to the second pulse for providing a third pulse;

fifth means connected to the fourth means and responsive to the third pulse for providing a fourth pulse, and for providing a first controlling output when the difference between the summation signal and the other redundant signal is within predetermined limits and a second controlling output when said difference exceeds the predetermined limits; and

indicating means connected to the fifth means and responsive to the first controlling output for providing an off indication and responsive to the second controlling output for providing an on indication.

2. A device as described by claim 1, wherein the fifth means provides the first controlling output when the third pulse provided by the fourth means goes through a transition from one logic level to another during the fourth pulse and -provides the second controlling output when the third pulse goes through said transition outside of the fourth pulse,

3. A device as described by claim 1, wherein the first controlling output is at alternate high and low levels so as to correspond to the complement of the third pulse.

4. A device as described by claim 1, wherein the second controlling output is a constant level output.

5. A device as described by claim 1, wherein:

a first inverter is connected to the fourth means for providing a fifth pulse complementary to the third pulse provided by said fourth means; and

the fifth means provides the fourth pulse and the first and second controlling outputs in response to the third pulse and the complementary fifth pulse.

6. A device as described by claim 1, wherein:

the third means provides the second pulse when the triggering pulse provided by the second means is at a predetermined threshold level; and

the second means includes a capacitor which is charged to the threshold level during a predetermined interval when the difference between the summation signal and the other redundant signal is Within the predetermined limits and is charged to said threshold level during an interval other than the predetermined interval when said difference exceeds the predetermined limits.

7. A device as described by claim 5, wherein the first means includes:

means for providing a starting pulse;

means connected to the means for providing a starting pulse for providing the first pulse in response to said starting pulse; and

said last mentioned means being connected to the first inverter and responsive to the complementary fifth pulse for repeating the first pulse,

8. A device as described by claim 5, wherein the first means includes:

means for providing a starting pulse;

means connected to the means for providing a starting pulse for providing the first pulse in response to said starting pulse; and

said last mentioned means being connected to the fifth means and responsive to the first controlling output for repeating the first pulse.

9. A device as described by claim 5 wherein the fifth means comprises:

a first multivibrator connected to the first inverter for providing a sixth pulse in response to the complementary fifth pulse;

a second multivibrator connected to the first multivibrator for providing a seventh pulse in response to the sixth pulse;

a second inverter connected to the second multivibrator for providing an eighth pulse complementary to the seventh pulse;

first differentiating means connected to the fourth means for providing a first differentiated pulse in response to the third pulse;

second differentiating means connected to the first inverter for providing a second differentiated pulse in response to the complementary fifth pulse;

gating means connected to the first and second differentiators and responsive to the first and second differentiated pulses for providing a triggering pulse;

means connected to the gating means, the second multivibrator and the second inverter and responsive to the triggering pulse, the seventh pulse and the eighth complementary pulse for providing the first and second controlling outputs.

10. A device as defined by claim 9, wherein the last mentioned means comprises:

a flip fiop having a set terminal, a reset terminal and a triggering terminal;

the second multivibrator is connected to the reset terminal; the second inverter is connected to the set terminal;

the gating means is connected to the triggering terminal so that the last mentioned means is triggered by the triggering pulse for providing the first controlling output at alternate high and low levels in response to the seventh pulse and the complementary eighth pulse when the difference between the summation signal and the other redundant signal is within the predetermined limits whereby the third pulse and the complementary fifth pulse go through a transition from one logic level to another during the seventh pulse, with said first controlling output being a reproduction of the complementary fifth pulse; and

the last mentioned means being triggered by the triggering pulse for providing the second controlling output at a constant level in response to the seventh pulse and the complementary eighth pulse when the difference between the summation signal and the other redundant signal is within the predetermined limits whereby the third pulse and the complementary fth pulse go through said transition outside of the seventh pulse.

References Cited UNITED STATES PATENTS 2,713,674 7/ 1953 Schmitt 340-67 JOHN W. CALDWELL, Primary Examiner HAROLD I. PITTS, Assistant Examiner U.S. Cl. X.R. 

